1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device such as a semiconductor integrated circuit having elements isolated by a trench.
2. Description of the Related Art
In a conventional semiconductor integrated circuit, a plurality of element regions electrically isolated from each other are arranged on a major surface of a semiconductor substrate. An active element such as a transistor and a passive element such as a resistor are formed on these element regions. The element regions are isolated from each other by a trench, a p-n junction, an oxide film, and the like. A prior art example wherein an integrated circuit is manufactured by an element isolation method using a trench will be described below.
As shown in FIG. 1, a trench 11 is formed to surround an element region 12 of an Si substrate 13 by anisotropic etching. A nonoxide film 14 such as a silicon nitride (SiN.sub.x) film is selectively formed on the upper surface of the element region 12. Thermal oxidation is performed for the resultant structure using the nonoxide film 14 as a mask to form an oxide film 15 on the inner surface of the trench 11 and the upper surface of a field region 16. Thereafter, a polysilicon layer 17 is buried in the trench 11, and after the surface of the polysilicon layer 17 is flattened, a capping oxide film 18 is formed on the trench 11.
In order to improve integration of elements, an interval W.sub.TL between the end of the nonoxide film 14 and the first side wall (indicated by broken line in FIG. 1) of the trench 11 is generally designed to be minimized. The interval W.sub.TL is conventionally selected from the range of 0 .mu.m to 1 .mu.m. However, when the interval W.sub.TL is too small, dislocation defects 23 may be extended in the inside of the substrate from corner portions 21 of the upper portion of the trench 11 and corners 22 of the bottom by stress concentration upon formation of the oxide film 15 by thermal oxidation, as shown in FIG. 2.
The dislocation defects cause degradation of isolation characteristics between element regions and characteristics of elements formed on the element regions. For example, when a bipolar transistor is formed on each of the element regions, the presence of dislocation defects causes a leak current of each transistor to increase or causes various characteristics such as collector current (Ic) vs. current amplification factor (h.sub.FE) characteristics to degrade. More specifically, when dislocation defects are present at a given density, a recombination current is increased using defects as the center of recombination, thereby degrading characteristics of the element or element isolation characteristics.